Ferroelectric capacitor with a self-aligned diffusion barrier
US6462368B2 · kind B2 · utility
7Cited by
9References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2002 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Jan 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A diffusion preventive layer extending between the bottom surface of a lower electrode and an interconnection connecting the lower electrode to one of the diffusion layer of a switching transistor is self-aligned. As a result, side trench is produced since a hole pattern is formed by using a dummy film, and even if a contact plug of a memory section is misaligned with the diffusion preventive layer, the contact plug is out of direct contact with a dielectric film having a high permittivity. Hence, a highly reliable device can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.