Patent · US Expired

Process for producing a bipolar transistor with self-aligned emitter and extrinsic base

US6465317B2 · kind B2 · utility

19Cited by
2References
37Claims
0Family size

Assignee

Inventor

Key dates

Filing dateJan 19, 2001
Grant dateOct 15, 2002
Priority date
Expiry dateMar 22, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D10/021

Abstract

A transistor manufacturing process includes the formation, on a layer (15) that will form the base of the transistor, of a stack of an SiGe alloy layer (16), a silicon oxide layer (17) and a silicon nitride layer (18), so as to form in this layer, a false emitter (20), to form, in the layer (15) that will form the base, an extrinsic base region (22) and to siliconize the surface of this extrinsic base region, to cover the extrinsic base region (22) and the false emitter (20) with a silicon dioxide layer (24) which is chemically and mechanically polished down to the level of the false emitter (20), to etch the false emitter (20) in order to form a window (25) and to form, in the window (25) and on the silicon dioxide layer (24), a polysilicon emitter (27). This process has particular application to manufacturing heterojunction bipolar transistors.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.