Process for depositing and planarizing BPSG for dense trench MOSFET application
US6465325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2002 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Feb 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for filling a trench having sidewalls and a floor in a semiconductor device or integrated circuit comprises: forming an insulating layer on the sidewalls and floor of a trench in a semiconductor substrate, substantially filling the trench with semiconductor material, removing semiconductor material from an upper portion of the trench, depositing a first layer of BPSG in the upper portion of the trench, heating the substrate to a first temperature greater than about 850° C. and up to about 1100° C., depositing a second layer of BPSG above the first layer of BPSG, and heating the substrate to a second temperature greater than about 850° C. and up to about 1100° C. The first and second BPSG layers each comprises boron and phosphorus in a weight ratio of boron: phosphorus of greater than 1:1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.