Methods of fabricating integrated circuit bonding pads including intermediate closed conductive layers having spaced apart insulating islands therein
US6465337B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Sep 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Bonding pads for integrated circuits include first and second spaced apart conductive layers, a third continuous conductive layer between the first and second spaced apart conductive layers and an array of spaced apart insulating islands in the third continuous conductive layer that extend therethrough such that sidewalls of the insulating islands are surrounded by the third continuous conductive layer. A fourth continuous conductive layer also may be provided between the third continuous conductive layer and the second conductive layer and a second array of spaced apart insulating islands may be provided in the fourth continuous conductive layer, that extend therethrough, such that sidewalls of the insulating islands are surrounded by the fourth continuous conductive layer. A fifth continuous conductive layer also may be provided between the third and fourth continuous conductive layers and a third array of spaced apart insulating islands may be provided in the fifth continuous conductive layer, that extend therethrough, such that sidewalls of the third array of insulating islands are surrounded by the fifth continuous conductive layer. The first and second arrays of spaced apart …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.