Semiconductor device and its manufacturing method
US6465342B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Mar 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1036
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The object of the invention is to solve failure in embedding conductive material by electroplating caused because organic insulating material is deformed by the compressive stress of a barrier metal layer such as tantalum nitride used for grooved interconnection, a groove-used for grooved interconnection is deformed and a seed layer is not fully formed in the groove and to enhance reliability upon interconnection. To achieve the object, a semiconductor device according to the invention is based upon a semiconductor device having a groove formed through a second insulating film over a substrate, a barrier metal layer formed at least on the inner wall of the groove and grooved interconnection embedded inside the groove via the barrier metal layer and is characterized in that a concave portion is continuously or intermittently formed along a groove through a second insulating film within a predetermined interval from grooved interconnection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.