Post etch clean sequence for making a semiconductor device
US6465358B1 · kind B1 · utility
29Cited by
13References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Nov 21, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/963
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved method of forming a semiconductor device is described. The method comprises forming a dielectric layer on a substrate, forming a photoresist layer on the dielectric layer, then patterning the photoresist layer to define a region to be etched. After forming an etched region within the dielectric layer, the photoresist layer is removed and the etched region is cleaned. The etched region is cleaned by applying a buffered oxide etch dip, followed by an amine based dip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.