Method for forming gate of semiconductor device
US6465362B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Sep 9, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28061
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for forming a gate of a semiconductor device that uses a cobalt silicide. The method for forming the gate of the semiconductor device can include preparing a semiconductor substrate, form a first insulation layer on the semiconductor substrate, form a doped polycrystalline silicon layer simultaneously with a deposition or after the deposition and forming a cobalt silicide layer by another deposition or by reacting a cobalt layer with the polycrystalline silicon layer. The cobalt silicide layer is selectively removed by using at least one etchant gas selected from a group of a gas including a chlorine atom group, a gas mixture of the gas including the chlorine atom group and oxygen, a gas mixture of the gas including the chlorine atom group and an inert gas, and a gas including the above-enumerated gases and a gas having a fluorine atom group. Then, the polycrystalline silicon layer is patterned. The method for forming the gate of the semiconductor device uses a less complex, less costly or more efficient process, and reduces a resistance of the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.