High-breakdown voltage heterostructure field-effect transistor for high temperature operations
US6465815B2 · kind B2 · utility
5Cited by
1References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/4735
Abstract
The invention relates to a high-breakdown voltage heterostructure field-effect transistor (FET), which can be used under a high temperature condition. The FET device from bottom upward in succession includes a semiconductor substrate, a buffer layer, a delta-doped sheet, an undoped layer, a sub-channel layer, an active channel layer, a gate layer, and an ohmic contact layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.