Embedded LSI having a FeRAM section and a logic circuit section
US6465826B2 · kind B2 · utility
8Cited by
3References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 2, 2001 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Jan 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B53/40
Abstract
An embedded LSI includes a FeRAM macro block and an associated logic circuit section. A hydrogen barrier layer covers the FeRAM macro block as a whole and exposes the logic circuit section. The edge of the hydrogen barrier layer overlies the peripheral circuit of the FeRAM macro block and the boundary separating the FeRAM macro block from the logic circuit section. The ferroelectric capacitor is protected by the hydrogen barrier layer against hydrogen during a hydrogen-annealing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.