Patent · US Expired

Integrated circuit having capacitive elements

US6465868B1 · kind B1 · utility

8Cited by

3References

12Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Ehben · Hersbruck, DE
Thomas Steinecke · Hofsingelding, DE
Jens Rosenbusch · Munich, DE

Key dates

Filing date	Aug 16, 2000
Grant date	Oct 15, 2002
Priority date	—
Expiry date	Aug 16, 2020

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3011
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An integrated circuit having capacitive elements for smoothing a supply voltage is described. In this case, at least one additional metal electrode, which is configured as a high frequency-optimized capacitance and is distinguished by an extremely low sheet resistance, is connected in parallel with the MOS capacitances. By connecting the areally highly effective MOS capacitance, which, however, is connected with a somewhat higher impedance, in parallel with areally less effective metal capacitances, which, however, are connected to the supply voltage in a very low-impedance manner, it is possible to obtain broadband buffering and thus decoupling of high-frequency interference signals. Very high-frequency interference components are attenuated on the chip and do not pass into the system surrounding the integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.