Memory configuration having redundant memory locations and method for accessing redundant memory locations

US6466493B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Manfred Menke · Ritterhude, DE
• Manfred Hans Plan · Hersbruck, DE

Key dates

• Filing date: Oct 17, 2000
• Grant date: Oct 15, 2002
• Expiry date: Oct 17, 2020

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/78
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A memory configuration is divided into memory blocks and allows a flexible access to redundant memory locations by using both, redundant column lines and redundant row lines of a particular memory block to repair defects of another memory block. Thus more defects can be repaired in the other memory block than there are redundant memory locations present in the other memory block. A method of accessing redundant memory locations is also provided. The memory configuration and the method of accessing redundant memory locations can be used in all memory architectures that write or read one or more bits of information per address in a parallel manner.