SOI LDMOS structure with improved switching characteristics
US6468878B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2001 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Feb 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.