Process for manufacturing integrated devices comprising microstructures and associated suspended electrical interconnections
US6469330B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 1999 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Oct 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated device comprises an epitaxial layer forming a first and a second region separated by at least one air gap. The first region forms, for example, a suspended mass of an accelerometer. A bridge element extends on the air gap and has a suspended electrical connection line electrically connecting the first and the second region and a protective structure of etch-resistant material, which surrounds the electrical connection line on all sides. The protective structure is formed by a lower portion of silicon nitride and an upper portion of silicon carbide, the silicon carbide surrounding the electrical connection line at the upper and lateral sides.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.