Method and apparatus for dividing a store operation into pre-fetch and store micro-operations
US6470444B1 · kind B1 · utility
19Cited by
6References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 16, 1999 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Jun 16, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/383
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of performing a store operation in a computer processor is disclosed. The method issues a store operation that is divided into a pre-fetch micro-operation that loads a needed cache line into a cache memory, and the subsequent store micro-operation stores a data value into the needed cache line that was pre-fetched into the cache memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.