Integrated photovoltaic switch with integrated power device including etching backside of substrate
US6472254B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2000 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Dec 21, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
N+ or P+ diffusions are formed in a lightly doped P type or N type starting wafer. Individual planar and spaced cells or tubs are then formed by etching an array of intersecting trenches between the P+ (or N+) diffusions. The trenches extend through the thin device layer to a predefined depth and are filled with a dielectric and with polysilicon to dielectrically insulate each of the tubs. At least one diffusion of each cell is connected to a diffusion of an adjacent cell to connect each of a predetermined number of the cells. The N+ or (P+) diffusions may be each enclosed by a ring shaped P+ or N+ contact diffusion. An MOS-gated device may be integrated into the same chip and may be a lateral or vertical MOSFET or a lateral or vertical IGBT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.