Module based address translation arrangement and transaction offloading in a digital system
US6473813B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 17, 1999 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Aug 17, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/42
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address translation arrangement and associated method for use in a digital system are described. The system includes a plurality of modules and a bus arrangement which interconnects the modules for executing data transactions using the bus arrangement. Each data transaction includes an address portion which defines a data portion. A first one of the modules is configured for initiating the address portion of the data transaction on the bus arrangement. A second one of the modules is configured for receiving the address portion of the transaction on the bus arrangement from the first module and includes a translation arrangement configured for selecting, based on a set of criteria including the address portion, (i) the second module to participate in the data portion with the first module and for, (ii) as an alternative, generating a translated address portion such that the translated address portion identifies one of the modules, other than the first or second module and, thereafter, for sending the translated address portion to the identified one of the modules such that the identified module then participates in the data portion of the transaction with the first module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.