Integrated circuit
US6476430B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2000 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Sep 7, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
In transistors with sub-micron channels, short-channel effects, such as a lowering of the threshold voltage, are usually suppressed by means of a halo (or pocket) implant in the source/drain regions, which operation is performed jointly with the LDD implantation. The halo implant, however, decreases the analog performance of transistors. To combine suppression of short-channel effects with a high analog performance, it is proposed to provide only transistors T1, which are not intended for analog functions with the halo implant (16), and to mask the analog transistors T2 with a mask (15) against the halo implant. To avoid short-channel effects in T2, this transistor is provided with a channel whose length is larger than that of transistor T1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.