Programmable number of metal lines and effective metal width along critical paths in a programmable logic device
US6476635B1 · kind B1 · utility
5Cited by
7References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2000 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Jun 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17792
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A layout architecture for a programmable logic device comprising one or more adjacent metal lines, a first circuit, and a second circuit. The one or more adjacent metal lines may each comprise a critical path. The first circuit may be configured to present an input signal to each of the one or more adjacent metal lines in response to a configuration signal. The second circuit may be configured to (i) receive a signal from at least one of the one or more adjacent metal lines selected in response to the configuration signal and (ii) generate an output signal in response to the received signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.