Tester, a test system, and a testing method for a semiconductor integrated circuit
US6480016B1 · kind B1 · utility
5Cited by
6References
5Claims
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Assignee
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Key dates
| Filing date | Aug 25, 2000 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Oct 12, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31926
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An input signal for testing a device is stored in a first storage located on a test board. An expectation value signal output by the device, when it operates normally, in response to the input signal is stored in a second storage located on the same test board. The input signal from the first storage is supplied to the device based on an instruction from a tester body. The device outputs an output signal in response to input of this input signal. This signal is sent to a comparator. The comparator compares the signal output from the device with the expectation value signal stored in and output from the second storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.