Split gate field effect transistor (FET) device with enhanced electrode registration and method for fabrication thereof

US6482700B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Han-Ping Chen · Saratoga, US
• Hung-Cheng Sung

Key dates

• Filing date: Nov 29, 2000
• Grant date: Nov 19, 2002
• Expiry date: Dec 15, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/018

Abstract

Within a method for fabricating a split gate field effect transistor (FET) within a semiconductor integrated circuit microelectronic fabrication there is employed a patterned mask layer as an etch mask layer for forming from a blanket floating gate electrode material layer a floating gate electrode. At least a portion of the patterned mask layer is then laterally etched to completely expose an edge of the floating gate electrode prior to forming over the floating gate electrode and the edge of the floating gate electrode an inter-gate electrode dielectric layer having formed thereupon a control gate electrode. The method contemplates a split gate field effect transistor (FET) device fabricated in accord with the method. The resulting split gate field effect transistor (FET) device has an enhanced control gate electrode to floating gate electrode registration.