EMC protection in digital computers
US6483720B1 · kind B1 · utility
3Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2000 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Aug 17, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/189
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and implementing electronic tri-plate connection system are provided including a nested set of RF Faraday cages within the system with integrated circuit packages containing the core drivers and receivers as the innermost Faraday cage, and additional Faraday cages being implemented at each outward level through card, board, backplane and unit level and into the network level. There is no distinction between power ground, signal ground or shield ground. All grounds throughout the system are at the same level and all package ground levels are interconnected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.