Method for manufacturing a semiconductor device having incorporated therein a high K capacitor dielectric
US6486021B2 · kind B2 · utility
3Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2000 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Dec 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device for use in a memory cell includes an active matrix an active matrix provided with a semiconductor substrate, a plurality of transistors formed on the semiconductor substrate and conductive plugs electrically connected to the transistors, a number of lower electrodes formed on top of the conductive plugs, Ta2O5 films formed on the lower electrodes, composite films formed on the Ta2O5 films and upper electrodes formed on the composite films.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.