Process for preparing Cu damascene interconnection
US6486057B1 · kind B1 · utility
18Cited by
5References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a technique of enhancing adhesion between a passivation layer and a low-K dielectric layer, in which a SiO2 layer as the passivation formed on the low-K dielectric layer is subjected to N2O plasma annealing. This technique is useful in improving the yield of a process for preparing Cu damascene interconnection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.