Non-volatile memory cell
US6486509B1 · kind B1 · utility
15Cited by
7References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2000 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Sep 11, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is related to a non-volatile memory cell, comprising a semiconductor substrate including a source region and a drain region with a channel region there between; a floating gate of a conductive material at least partially extending over a first portion of said channel region; a control gate of a conductive material and at least partially extending over a second portion of the channel region; an additional program gate of a conductive material and at least partially overlapping said floating gate and being capacitively coupled through a dielectric layer to said floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.