Programming a phase-change memory with slow quench time
US6487113B1 · kind B1 · utility
249Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2001 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Jun 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0092
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory array is operated by increasing a number of currents through a number of corresponding cells of the array, where each cell has a structural phase-change material to store data for that cell. Each of the currents are increased to an upper level that is sufficiently high that can cause the corresponding cell to be in a first state. Some of the currents are decreased to lower levels at sufficiently high rates that cause their corresponding cells to be programmed to the first state, while others are decreased at sufficiently low rates that cause their corresponding cells to be programmed to a second state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.