Structure of an embedded channel write-erase flash memory cell and fabricating method thereof
US6489202B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2001 |
| Grant date | Dec 3, 2002 |
| Priority date | — |
| Expiry date | May 29, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
The present invention relates to a structure of an embedded channel write/erase flash memory cell and a fabricating method thereof and, more particularly, to a structure combining CMOS devices and flash memory cells, wherein flash memory cell structures and CMOS devices are simultaneously fabricated on a substrate to reduce the cost and to simplify the process flow. Moreover, CMOS devices capable of performing high-voltage and low-voltage operations are reserved. Therefore, the present invention can not only effectively improve the operating efficiency of flash memory cells and CMOS devices, but its whole volume is also smaller than that obtained by combining separately designed and fabricated CMOS devices and flash memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.