Semiconductor integrated circuit having three-dimensional interconnection lines
US6489671B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2002 |
| Grant date | Dec 3, 2002 |
| Priority date | — |
| Expiry date | Mar 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit has a 3-dimmensional interconnection line structure for high-speed operation. One aspect of the present invention, there is provided a monolithic microwave integrated circuit (MMIC) having a 3-dimmensional tournament tree shaped multilayer interconnection lines, wherein a single electric feeding point on a top surface of the MMIC is divided, layer by layer, into plural electrodes on the semiconductor substrate of the MMIC via a plurality of laminated interconnection layers and vertical interconnection layers therebetween shaped like a tournament tree.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.