Semiconductor device having control electrodes with different impurity concentrations

US6492690B2 · kind B2 · utility

Assignee

• Mitsubishi Electric Corporation · JP

Inventors

• Shuichi Ueno · Yokohama, JP
• Yoshinori Okumura · Kasai, JP
• Shigenobu Maeda · Kasai, JP
• Shigeto Maegawa · Tokyo, JP

Key dates

• Filing date: Aug 4, 1999
• Grant date: Dec 10, 2002
• Expiry date: Aug 4, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B41/49

Abstract

According to a semiconductor device and a method of manufacturing the same, a trade-off relationship between threshold values and a diffusion layer leak is eliminated and it is not necessary to form gate oxide films at more than one stages. Since impurity dose are different from each other between gate electrodes (4A to 4C) of N-channel type MOS transistors (T41 to T43), impurity concentration in the gate electrodes (4A to 4C) are different from each other. The impurity concentration in the gate electrodes are progressively lower in the order of higher threshold values which are expected.