Nonvolatile semiconductor memory device
US6493265B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2002 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Apr 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of determining multi-bit data in a multi-level memory. The method includes setting a source potential of a memory cell to a first source potential, setting a gate potential thereof to a first read-out potential, and determining if bit data of a first digit of multi-bit data is “0” or “1”. Also, the method includes setting the source potential of the memory cell to the first source potential and setting the gate potential thereof to a second read-out potential that is different from the first read-out potential when the bit data of the first digit is “0”, and determining if bit data of a second digit of the multi-bit data is “0” or “1”. In addition the method includes setting the source potential of the memory cell to a second source potential different from the first source potential and setting the gate potential thereof to the second read-out potential when the bit data of the first digit is “1”, and determining if bit data of the second digit of the multi-bit data is “0” or “1”.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.