Direct memory access controller with channel width configurability support
US6493803B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 1999 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Aug 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A direct memory access (DMA) controller provides seven DMA channels configurable for a PC/AT compatible mode or an enhanced mode. In an enhanced mode of the DMA controller, three DMA master channels on a master DMA controller and a DMA channel on a slave DMA controller are individually configurable to be either 8-bit or 16-bit DMA channels. In addition, in the enhanced mode, a memory address can increment or decrement across a memory page boundary. The DMA controller includes a transfer count register selectively configured for 16-bit operation or 24-bit operation. The DMA controller also includes address generation logic selectively configured for 24-bit operation or 28-bit operation. In the PC/AT compatible mode, the DMA controller supports three 16-bit channels and four 8-bit channels. The DMA controller thus provides DMA channel width configurability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.