Process for fabricating sharp corner-free shallow trench isolation structure
US6495430B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2002 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | May 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a sharp corner-free shallow trench isolation structure. First, a SiON layer and a mask layer are successively formed on a semiconductor substrate. The SiON layer and mask layer are patterned to form an opening, exposing the substrate region on which a shallow trench isolation region will be formed. Next, an oxide spacer is formed on sidewalls of the SiON layer and mask layer. A trench is formed in the semiconductor substrate using the spacer and mask layer as a mask. Next, a liner oxide layer is formed on the surface of the trench by thermal oxidation, such that the liner oxide layer near the SiON layer is in a bird's beak form. An isolating oxide layer is filled in the trench. Finally, the mask layer and SiON layer are removed. The present invention forms a short and thick bird's beak structure and rounded trench corner. Therefore, the thickness of the tunnel oxide is even and the tunnel oxide integrity remains. Thus, the electric current is not accumulated on the trench corner, and parasitic transistors and current leakage can be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.