Semiconductor device and method for patterning the semiconductor device in which line patterns terminate at different lengths to prevent the occurrence of a short or break
US6495870B1 · kind B1 · utility
12Cited by
2References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 29, 1999 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Jun 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a masking pattern (a) for patterning word and data lines, length is changed between adjacent word lines so as to be shifted from each other at their tips, and furthermore, the tip of each word line is cut obliquely.It is thus possible to prevent the resist pattern from separation and contact of adjacent patterns. Consequently, it is also possible to prevent break failures of patterned lines and short failures between those patterned lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.