Selective device coupling
US6496408B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Aug 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices and other integrated circuit devices having a first capacitor and a second capacitor with an interposing selective isolation device, and methods of their operation. A selective isolation device is a device selectively in a state of conductance or non-conductance. When the selective isolation device is in a state of conductance, the first capacitor is coupled to the second capacitor. When the selective isolation device is in a state of non-conductance, the first capacitor is electrically isolated from the second capacitor. In memory devices, such parallel coupling of adjacent storage capacitors of adjacent memory cells is useful in increasing beta ratio and providing defect isolation. Such coupling of adjacent storage capacitors generally reduces the number of uniquely addressable memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.