Adaptive threshold logic circuit
US6498510B2 · kind B2 · utility
1Cited by
11References
61Claims
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Assignee
Inventor
Key dates
| Filing date | Mar 14, 2001 |
| Grant date | Dec 24, 2002 |
| Priority date | — |
| Expiry date | Mar 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An adaptive threshold logic circuit is provided in which the switching threshold levels of the logic circuit are automatically changed to accommodate variations in the level of applied data signals to the switching circuit. A detector stage detects the voltage level of the incoming data signals and selectively adjusts the threshold level of a threshold adaptor stage in accordance with the output of the detector stage. The threshold adaptor stage is essentially an adaptive CMOS inverter having various switching paths turned on or off in accordance with the output of the detector stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.