Manufacture of printed circuits using single layer processing techniques
US6500349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2000 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Dec 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1545
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A continuous process for forming multilayer circuit structures which includes applying and curing a film forming polymer onto the matte side of a copper foil. The opposite (shiny) side of the foil is optionally but preferably cleaned, and applied with a photoresist which is then optionally but preferably dried. The photoresist is exposed, and developed to remove the nonimage areas but leave the image areas. The foil under the removed nonimage area is then etched to form a copper pattern, and the remaining photoresist is optionally but preferably removed. The foil is then cut into sections, and then optionally but preferably punched with registration holes. The copper pattern is then optionally but preferably treated with a bond enhancing treatment, optionally but preferably inspected for defects, and laminated onto a substrate to form a multilayered circuit structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.