Multi-chip semiconductor package with heat dissipating structure
US6501164B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2001 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Dec 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-chip semiconductor package with a heat dissipating structure is proposed, in which a chip receiving cavity and an opening respectively formed in the heat dissipating structure and a chip carrier, are used to accommodate semiconductor chips therein with the chips being in direct contact with the heat dissipating structure, allowing heat generated by the chips to be rapidly dissipated through the heat dissipating structure. With the provision of through holes for interconnecting the chip receiving cavity and opening, gold wires pass the through holes and electrically connect the chips to the chip carrier. Such a structure with chips embedded in the chip receiving cavity and opening makes internal elements to be more compactly arranged in the semiconductor package, which is preferable in response to profile miniaturization of electronic product development.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.