Conversion between packed floating point data and packed 32-bit integer data in different architectural registers
US6502115B2 · kind B2 · utility
35Cited by
37References
55Claims
0Family size
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Key dates
| Filing date | Apr 27, 2001 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Apr 27, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and instruction for converting a number between a floating point format and an integer format are described. Numbers are stored in the integer format in a register of a first set of architectural registers in a packed format. At least one of the numbers in the integer format is converted to at least one number in the floating point format. The numbers in the floating point format are placed in a register of a second set of architectural registers in a packed format.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.