Circuit modeling
US6502230B1 · kind B1 · utility
4Cited by
1References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 2, 2001 |
| Grant date | Dec 31, 2002 |
| Priority date | — |
| Expiry date | Jul 31, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a system and method of modeling electrical circuits. The present invention may provide improved software for predicting microchip interconnect delays, and in general for an improved semiconductor manufacturing models. Further, the invention may provide for accurate prediction of resistance, capacitance and inductance for interconnections in a semiconductor, allowing for both environmental values and process variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.