Solid via layer to layer interconnect
US6504111B2 · kind B2 · utility
15Cited by
18References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 2001 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | May 29, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a structure for providing an interconnect between layers of a multilayer circuit board. The structure comprises a stack that includes at least one layer and a via opening that extends through at least one layer of the stack. Each individual via opening is filled with a solid conductive plug and each solid conductive plug has a first contact pad and a second contact pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.