Superior silicon carbide integrated circuits and method of fabricating
US6504184B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 14, 2001 |
| Grant date | Jan 7, 2003 |
| Priority date | — |
| Expiry date | Sep 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides semiconductor devices having at least one silicon region in a silicon carbide wafer in which is fabricated a low voltage semiconductor device such as for example, MOSFET devices, BiCMOS devices, Bipolar devices, etc., and on the same chip, at least one silicon carbide region in which is fabricated a high voltage (i.e., >1000V) semiconductor device using techniques well known in the art, such as for example, LDMOSFET, UMOSFET, DMOSFET, IGBT, MESFET, and JFET devices. Such devices are derived from a method for forming a silicon region on a silicon carbide substrate which comprises the steps of:providing a monocrystalline silicon carbide substrate;amorphizing at least one region of the substrate, preferably by subjecting at least a portion of a surface of the substrate to ion implantation to convert at least a portion of the substrate surface to amorphous silicon carbide producing a region of amorphous silicon carbide on a monocrystalline silicon carbide substrate;removing at least an effective amount of carbon from said amorphized region, preferably by subjecting at least a portion of the amorphous silicon carbide region to an etchant material which sel…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.