Method of fabricating a thin film transistor
US6506669B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/1368
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There are reduced degradation of the performance of a transistor element, variations in the quality thereof, and the like resulting from the surface roughness of a polycrystalline silicon thin film formed by laser annealing, particularly from the presence of portions in which tramp materials are segregated produced in the rough portions. For this purpose,(1) The projections at the surface portion of the polycrystalline silicon thin film and the portions in which the tramp materials are segregated after laser annealing are chemically, mechanically graded.(2) Likewise, a heat treatment is performed to grow a crystal and planarize the rough portions, while removing the tramp materials in the surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.