Silicon-based PT/PZT/PT sandwich structure and method for manufacturing the same
US6507060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2001 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | May 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/684
Abstract
A silicon based PT/PZT/PT sandwich structure is disclosed. A dielectric layer is formed over a semiconductor substrate. The dielectric layer preferably comprises a silicon dioxide layer. A first and the second conductive films are sequentially formed over the dielectric layer. A first ferroelectric film is formed over the first and second conductive films. A second ferroelectric film is formed over the first ferroelectric film. A third ferroelectric film is formed over the second ferroelectric film. The resulting structure is annealed. A third and fourth conductive films are sequentially formed over the third ferroelectric layer. The third and fourth conductive films are patterned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.