Current source calibration circuit
US6507296B1 · kind B1 · utility
20Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2001 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | Aug 14, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/747
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current source calibration circuit and methodology reduce noise generated by current switching. In one embodiment, the calibration circuit provides a random or pseudo-random clock signal to control a switching of calibration circuit. A clock signal generator has been described that provide a number of clock signals having different phases. In one embodiment, the clock signals are used to select a current source of a DAC for calibration. By using a random clock to select the current source, noise, which is generated by switching a primary current source with a backup current source, is spread out over a wider frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.