Methods and circuits for testing a circuit fabrication process for device uniformity
US6507942B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2000 |
| Grant date | Jan 14, 2003 |
| Priority date | — |
| Expiry date | Dec 25, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Described are systems and methods for measuring the size uniformity of circuit features defined by the critical dimension of an integrated-circuit fabrication process. An integrated circuit is configured to include a number of oscillators, each occupying a region of the integrated circuit. Each oscillator oscillates at a frequency that depends on the critical dimension of features in the region in which it is formed. Consequently, the critical dimensions of regions across the surface of the integrated circuit can be mapped and compared by comparing the oscillation frequencies of identical oscillators formed in various regions of the integrated circuit. In programmable logic devices, oscillators can be implemented using programmable logic resources. In other embodiments, small, simple oscillators can be placed at various locations on the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.