Method for forming a flip chip semiconductor package
US6510976B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2001 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | May 18, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An oxidized (220) copper leadframe and a semiconductor die with copper posts extending from die pads, and with solder balls coated (225) with flux on the end of the copper posts, are provided. The semiconductor die is placed (230) on the oxidized copper leadframe, with the solder balls abutting portions of the layer of oxide, above and aligned with, interconnect locations on the leadframe. When reflowed (235), the flux on the abutting portions of the oxide layer selectively cleans these portions of the oxide layer, away from the interconnect locations. In addition, the solder balls change to molten state and adhere to the cleaned copper surfaces at the interconnect locations. Advantageously, the rest of the oxide layer that is not cleaned away provides a passivation layer that advantageously contains and prevents the molten solder from flowing away from the interconnect locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.