Super-junction semiconductor device
US6512268B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 23, 2000 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Aug 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
The super-junction semiconductor device includes an alternating conductivity type layer including n-type drift regions and p-type partition regions laminated alternately with each other outside the active region of the device. A first FP electrode is formed above n-type drift region with an insulation film interposed therebetween. The first FP electrode is made contact with the surface of p-type partition region or floated from p-type partition region. The FP electrode may be extended over a plurality of n-type drift regions. Resistance is arranged between the adjacent FP electrodes. An n-type stopper region is formed vertically through the second alternating conductivity type layer outside the active region and deeply enough to reach the layer with low electrical resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.