Method and apparatus using a semiconductor die integrated antenna structure
US6512482B1 · kind B1 · utility
110Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2001 |
| Grant date | Jan 28, 2003 |
| Priority date | — |
| Expiry date | Mar 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q23/00
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A communication device (50) operating at a plurality of frequencies has a processor (36) coupled to a semiconductor die integrated antenna structure (30) having a first integrated antenna (14) tuned to a first frequency and coupled to a first circuit (17) and at least a second integrated antenna (18) tuned to a second frequency and coupled to a second circuit (21). The processor controls either the first circuit or the second circuit or both.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.