Patent · US Expired

Wafer alignment system and method

US6516244B1 · kind B1 · utility

30Cited by
15References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 25, 2000
Grant dateFeb 4, 2003
Priority date—
Expiry dateOct 11, 2020

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S414/136
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A system and associated method for aligning semiconductor wafers and wafer-like objects relative to a transport mechanism. An image of, for example, a wafer is acquired, digitized, and stored in a computer as an array of pixels, each pixel representing a point on the image. Data points along the edge of the wafer are extracted and used to geometrically estimate the center of the wafer object. The estimated wafer center is then compared to the position of a predetermined reference position to determine an offset. Using this information, the wafer transport mechanism can then be re-adjusted to pick up the wafer on the corrected center.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.