Low dropout voltage regulator with non-miller frequency compensation
US6518737B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Sep 28, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/565
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low dropout voltage regulator with non-Miller frequency compensation is provided. The LDO circuit has two wide-band, low-power cascaded operational transconductance amplifiers (OTAs): an error amplifier and a unity-gain-configured voltage follower. The unity-gain-configured voltage follower drives a gate of a power PMOS path transistor with a high parasitic gate capacitance. The wide-band, low-power OTAs enable the use of a single, low-value load capacitor with a low equivalent series resistance (ESR). A frequency compensation capacitor is connected in parallel with the upper resistor of a feedback network, which introduces a zero-pole pair that enhances the phase margin close to unity-loop-gain frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.