Flexible address programming with wrap blocking
US6519690B1 · kind B1 · utility
16Cited by
2References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 23, 1999 |
| Grant date | Feb 11, 2003 |
| Priority date | — |
| Expiry date | Aug 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0888
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flexible address mapping method and mechanism allows mapping regions of a microcontroller's memory and I/O address spaces for a variety of applications by defining memory regions which are mapped to one of a set of physical devices by a programmable address mapper controlled by a set of programmable address registers. The mapping allows setting attributes for a memory region to prohibit writes, caching, and code execution. A deterministic priority scheme allows memory regions to overlap, mapping addresses in overlapping regions to the device specified by the highest priority programmable address register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.